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| # | Schedule | Awarded To | Bids | Value |
|---|---|---|---|---|
| 1 | Schedule 1 | Vibhatsu Technologies | 1 | ₹66.0 L |
| 2 | Schedule 2 | Vibhatsu Technologies | 3 | - |
| 3 | Schedule 3 | Vibhatsu Technologies | 1 | ₹78.5 L |
| 4 | Schedule 4 | Vibhatsu Technologies | 1 | ₹38.4 L |
Tender Value
₹3.3 Cr
EMD Value
Exempted
Closing Date
1 Jun 2021, 10:00 amClosed
LDPC Encoder-Decoder IP Core
PAPR Reduction Solution
Exostiv IP (Debugging Tool for Xilinx FPGA)
FPGA Development software
2338854
GEM/2021/B/1210518
LDPC Encoder-Decoder IP Core,PAPR Reduction Solution,Exostiv IP (Debugging Tool for Xilinx FPGA),FPG
120 days
Uttarakhand; Dehradun
Item wise evaluation
PRODUCT_CUSTOM
1 document required · 1 mandatory
| Item | Delivery Location | Qty | Delivery | Spec |
|---|---|---|---|---|
| LDPC Encoder-Decoder IP Core | DEHRADUN | 1 | 120 days | |
| PAPR Reduction Solution | DEHRADUN | 1 | 120 days | |
| Exostiv IP (Debugging Tool for Xilinx FPGA) | DEHRADUN | 1 | 120 days | |
| FPGA Development software | DEHRADUN | 1 | 120 days |
Exempted
1 Jun 2021
7 May 2021
1 Jun 2021
Tap a document below to read it instantly. You can also download everything as a ZIP if you prefer.
bid_2338854.pdf
GEM_BID
ldpcencoderdecoder_2021-05-07-15-45-02_5527c931617b47012841980820f51350.pdf
SPECIFICATION
paprreductionsolution_2021-05-07-15-40-50_7452a40f5e91ca0ff279d3bc1abd5ba8.pdf
SPECIFICATION
exostiveip_2021-05-07-15-31-48_118b0ff665ee42df1e80c8f7fd56476e.pdf
SPECIFICATION
fpgadevelopmentsoftware_2021-05-07-15-26-13_99336974a6949d5c4853cac97f7faf2a.pdf
SPECIFICATION
termsCondition.pdf
OTHER
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