GeM

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Goods

FPGA based fast multi-channel ADC to record time stamped data

PRODUCT_CUSTOM

Custom Item

FPGA based fast multi-channel ADC to record time stamped data

700106, UGC DAE CONSORTIUM FOR SCIENTIFIC RESEARCH LB- 8, SECTOR-III, BIDHAN NAGAR, SALT LAKE, (SECOND CAMPUS OF JADAVPUR UNIVERSITY, SALT LAKE) KOLKATA- | 24 Paraganas North, West Bengal | 24 Paraganas North

Amount: Refer DocsCloses: 19 Jan 2026Closed

Bids

1 Bid19 Jan 2026

#	Company	Amount	Rank	Status
1	L1₹3.1 LQualified 114 5 HAZRA ROAD HAZRA ROAD KALIGHAT KOLKATA WEST BENGAL 700026 \| KOLKATA \| WEST BENGAL \| 700026	₹3.1 L	L1	Qualified MSE, Category: General

Tender Value

Refer Docs

EMD Value

Exempted

Closing Date

19 Jan 2026, 6:00 pmClosed

Work Description

FPGA based fast multi-channel ADC to record time stamped data

Tender Information

Tender ID

8773537

Reference Number

GEM/2025/B/7053489

Tender Type

Two Packet Bid

Product Category

FPGA based fast multi-channel ADC to record time stamped data

Period of Work

30 days

Location

700106, UGC DAE CONSORTIUM FOR SCIENTIFIC RESEARCH LB- 8, SECTOR-III, BIDHAN NAGAR, SALT LAKE, (SECOND CAMPUS OF JADAVPUR UNIVERSITY, SALT LAKE) KOLKATA-

Evaluation Method

Total value wise evaluation

Bid Type

PRODUCT_CUSTOM

Source Website

Subscribe to view

Documents Required

11 documents required · 11 mandatory

RequiredExperience Criteria

RequiredPast Performance

RequiredBidder Turnover

RequiredCertificate (Requested in ATC)

RequiredOEM Authorization Certificate

RequiredOEM Annual Turnover

RequiredAdditional Doc 1 (Requested in ATC)

RequiredAdditional Doc 2 (Requested in ATC)

RequiredAdditional Doc 3 (Requested in ATC)

RequiredAdditional Doc 4 (Requested in ATC)

RequiredCompliance of BoQ specification and supporting document

Eligibility Criteria

Experience

3 yrs

Min Turnover

₹1 L

OEM Turnover

₹12 L

Past Performance

10%

Purchase Preferences

MSE EMD ExemptionStartup Exemption

Fee & Financial Details

EMD Fee Amount

Exempted

Important Dates

Last Activity

19 Jan 2026

Published

29 Dec 2025

Bid Opening

19 Jan 2026

Items & Quantities

•

FPGA based fast multi-channel ADC to record time stamped data

•

4 Channel 250 MSPS ADC Board with firmware to integrate the same with FPGA (ZED or equivalent FPGA board) along with suitable enclosure with cooling facility and all interconnecting cables and connectors

Total: 1

Documents

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Tender Documents

bid_8773537.pdf

GEM_BID

fpga_based_-z-board_or_equivalent-_fast_multi-chann_2025-12-29-13-06-02_83bedffe7c06d3ce32e00c9e7f2b9078.pdf

SPECIFICATION

1767009375.pdf

OTHER

1767008767.pdf

OTHER

fpga_e904c926-4ec1-44e5-90c21767009493110_engrG.ugcdaecsr.pdf

OTHER

list-of-categories-where-trials-are-allowed_1712126171.pdf

OTHER

gtc.pdf

OTHER

Ready to Participate?

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